? semiconductor components industries, llc, 2005 september, 2005 ? rev. 9 1 publication order number: mac97/d mac97 series preferred device sensitive gate triacs silicon bidirectional thyristors designed for use in solid state relays, mpu interface, ttl logic and any other light industrial or consumer application. supplied in an inexpensive to?92 package which is readily adaptable for use in automatic insertion equipment. features ? one?piece, injection?molded package ? blocking voltage to 600 volts ? sensitive gate triggering in four trigger modes (quadrants) for all possible combinations of trigger sources, and especially for circuits that source gate drives ? all diffused and glassivated junctions for maximum uniformity of parameters and reliability ? pb?free packages are available* maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit peak repetitive off-state voltage (t j = ?40 to +110 c) (note 1) sine wave 50 to 60 hz, gate open mac97a4 mac97a6 mac97a8 v drm, v rrm 200 400 600 v on-state rms current full cycle sine wave 50 to 60 hz (t c = +50 c) i t(rms) 0.6 a peak non?repetitive surge current one full cycle, sine wave 60 hz (t c = 110 c) i tsm 8.0 a circuit fusing considerations (t = 8.3 ms) i 2 t 0.26 a 2 s peak gate voltage (t 2.0 s, t c = +80 c) v gm 5.0 v peak gate power (t 2.0 s, t c = +80 c) p gm 5.0 w average gate power (t c = 80 c, t 8.3 ms) p g(av) 0.1 w peak gate current (t 2.0 s, t c = +80 c) i gm 1.0 a operating junction temperature range t j ?40 to +110 c storage temperature range t stg ?40 to +150 c maximum ratings are those values beyond which device damage can occur. maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. if these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. v drm and v rrm for all types can be applied on a continuous basis. blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. triacs 0.8 ampere rms 200 thru 600 volts preferred devices are recommended choices for future use and best overall value. see detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. ordering information mt1 g mt2 to?92 (to?226aa) case 029 style 12 3 2 1 pin assignment 1 2 3 gate main terminal 2 main terminal 1 http://onsemi.com mac 97ax ayww mac97ax = device code x = 4, 6, or 8 a = assembly location y = year ww = work week = pb?free package (note: microdot may be in either location) marking diagrams
mac97 series http://onsemi.com 2 thermal characteristics characteristic symbol max unit thermal resistance, junction?to?case r jc 75 c/w thermal resistance, junction?to?ambient r ja 200 c/w maximum lead temperature for soldering purposes for 10 seconds t l 260 c electrical characteristics (t c = 25 c unless otherwise noted; electricals apply in both directions) characteristic symbol min typ max unit off characteristics peak repetitive blocking current (v d = rated v drm , v rrm ; gate open) t j = 25 c t j = +110 c i drm , i rrm ? ? ? ? 10 100 a a on characteristics peak on?state voltage (i tm = .85 a peak; pulse width 2.0 ms, duty cycle 2.0%) v tm ? ? 1.9 v gate trigger current (continuous dc) (v d = 12 vdc, r l = 100 ) mt2(+), g(+) mt2(+), g(?) mt2(?), g(?) mt2(?), g(+) i gt ? ? ? ? ? ? ? ? 5.0 5.0 5.0 7.0 ma gate trigger voltage (continuous dc) (v d = 12 vdc, r l = 100 ) mt2(+), g(+) all types mt2(+), g(?) all types mt2(?), g(?) all types mt2(?), g(+) all types v gt ? ? ? ? .66 .77 .84 .88 2.0 2.0 2.0 2.5 v gate non?trigger voltage (v d = 12 v, r l = 100 , t j = 110 c) all four quadrants v gd 0.1 ? ? v holding current (v d = 12 vdc, initiating current = 200 ma, gate open) i h ? 1.5 10 ma turn-on time (v d = rated v drm , i tm = 1.0 a pk, i g = 25 ma) t gt ? 2.0 ? s dynamic characteristics critical rate?of?rise of commutation voltage (v d = rated v drm , i tm = .84 a, commutating di/dt = .3 a/ms, gate unenergized, t c = 50 c) dv/dt(c) ? 5.0 ? v/ s critical rate of rise of off?state voltage (v d = rated v drm , t c = 110 c, gate open, exponential waveform dv/dt ? 25 ? v/ s
mac97 series http://onsemi.com 3 + current + voltage v tm i h symbol parameter v drm peak repetitive forward off state voltage i drm peak forward blocking current v rrm peak repetitive reverse off state voltage i rrm peak reverse blocking current voltage current characteristic of triacs (bidirectional device) i drm at v drm on state off state i rrm at v rrm quadrant 1 mainterminal 2 + quadrant 3 mainterminal 2 ? v tm i h v tm maximum on state voltage i h holding current mt1 (+) i gt gate (+) mt2 ref mt1 (?) i gt gate (+) mt2 ref mt1 (+) i gt gate (?) mt2 ref mt1 (?) i gt gate (?) mt2 ref ? mt2 negative (negative half cycle) mt2 positive (positive half cycle) + quadrant iii quadrant iv quadrant ii quadrant i quadrant definitions for a triac i gt ? + i gt all polarities are referenced to mt1. with in?phase signals (using standard ac lines) quadrants i and iii are used.
mac97 series http://onsemi.com 4 = conduction angle 0.5 0.6 0.7 0.8 0.1 0.2 0.3 0.4 0 110 100 90 80 70 60 i t(rms) , rms on?state current (amps) t , maximum allowable case temperature ( c) c = 30 60 90 dc 180 120 50 40 30 figure 1. rms current derating figure 2. rms current derating = conduction angle 0.25 0.3 0.35 0.4 0.05 0.1 0.15 0.2 0 90 80 70 60 50 40 i t(rms) , rms on?state current (amps) 30 20 100 110 = 30 60 90 dc 180 120 , maximum allowable ambient temperature ( c) t(rms) i figure 3. power dissipation 0.4 0.5 0.6 0.7 0 0.1 0.2 0.3 0.6 0.4 0.2 0 i t(rms) , rms on?state current (amps) 0.8 = conduction angle 0.8 1.0 1.2 p , maximum average power dissipation (watts) (av) = 30 60 90 dc 180 120 0.006 0.01 0.02 0.04 0.06 0.1 0.2 0.4 0.6 1.0 2.0 4.0 6.0 t j = 110 c 25 c i tm , instantaneous on-state current (amp) 0.4 1.2 2.0 2.8 3.6 4.4 5.2 6.0 v tm , instantaneous on-state voltage (volts) figure 4. on?state characteristics
mac97 series http://onsemi.com 5 figure 5. transient thermal response figure 6. maximum allowable surge current 0.1 1.0 10 100 1.0 t, time (ms) 0.1 0.01 1 10 3 1 10 4 3.0 30 50 1.0 2.0 100 3.0 2.0 1.0 number of cycles 5.0 10 z jc(t) = r jc(t) r(t) 10 5.0 surge is preceded and followed by rated current. t j = 110 c f = 60 hz cycle i , peak surge current (amps) tsm r , transient thermal resistance (normalized) (t) figure 7. typical gate trigger current versus junction temperature figure 8. typical gate trigger voltage versus junction temperature figure 9. typical latching current versus junction temperature figure 10. typical holding current versus junction temperature 100 10 1 0 t j , junction temperature ( c) 1.2 0.4 t j , junction temperature ( c) 0.3 t j , junction temperature ( c) 1 t j , junction temperature ( c) 0.1 35 50 80 ?40 ?25 5 20 95 110 20 35 80 ?40 ?25 ?10 5 95 110 10 , gate trigger current (ma) gt , gate trigger voltage (v) gt , latching current (ma) l ?10 65 i q4 q3 q2 q1 0.5 0.6 0.7 0.8 0.9 1.0 1.1 v 50 65 q4 q3 q2 q1 i 100 10 1 0 35 50 80 ?40 ?25 5 20 95 110 ?10 65 q4 q3 q2 q1 35 50 80 ?40 ?25 5 20 95 110 ?10 65 , holding current (ma) h i mt2 negative mt2 positive
mac97 series http://onsemi.com 6 figure 11. simplified test circuit to measure the critical rate of rise of commutating voltage (dv/dt) c l l 1n4007 200 v + measure i ? charge control charge trigger non-polar c l 51 mt2 mt1 1n914 g trigger control 200 v rms adjust for i tm , 60 hz v ac note: component values are for verification of rated (dv/dt) c . see an1048 for additional information. r s adjust for dv/dt (c) c s ordering & shipping information u.s. europe equivalent shipping description of to92 tape orientation mac97a6rl1 radial tape & reel (2k/reel) flat side of to92 & adhesive tape visible mac97a6rl1g radial tape & reel (2k/reel) (pb?free) flat side of to92 & adhesive tape visible mac97a8rlrm mac97a8rl1 radial tape & reel (2k/reel) flat side of to92 & adhesive tape visible mac97a8rlrmg mac97a8rl1g radial tape & reel (2k/reel) (pb?free) flat side of to92 & adhesive tape visible mac97a4 bulk in box (5k/box) n/a, bulk mac97a4g bulk in box (5k/box) (pb?free) n/a, bulk mac97a6 bulk in box (5k/box) n/a, bulk mac97a6g bulk in box (5k/box) (pb?free) n/a, bulk mac97a8 bulk in box (5k/box) n/a, bulk mac97a8g bulk in box (5k/box) (pb?free) n/a, bulk mac97a6rlrf radial tape & reel (2k/reel) round side of to92 & adhesive tape on reverse side mac97a6rlrfg radial tape & reel (2k/reel) (pb?free) round side of to92 & adhesive tape on reverse side mac97a6rlrp radial tape & reel (2k/reel) round side of to92 & adhesive tape on reverse side mac97a6rlrpg radial tape & reel (2k/reel) (pb?free) round side of to92 & adhesive tape on reverse side MAC97A8RLRP radial tape / fan fold box (2k/box) round side of to92 & adhesive tape visible MAC97A8RLRPg radial tape / fan fold box (2k/box) (pb?free) round side of to92 & adhesive tape visible ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
mac97 series http://onsemi.com 7 to?92 eia radial tape in fan fold box or on reel h2a h2a h f1 f2 p2 p2 p1 p d w w1 l1 w2 h2b h2b t1 t t2 h4 h5 h1 l figure 12. device positioning on tape symbol item specification inches millimeter min max min max d tape feedhole diameter 0.1496 0.1653 3.8 4.2 d2 component lead thickness dimension 0.015 0.020 0.38 0.51 f1, f2 component lead pitch 0.0945 0.110 2.4 2.8 h bottom of component to seating plane .059 0.156 1.5 4.0 h1 feedhole location 0.3346 0.3741 8.5 9.5 h2a deflection left or right 0 0.039 0 1.0 h2b deflection front or rear 0 0.051 0 1.0 h4 feedhole to bottom of component 0.7086 0.768 18 19.5 h5 feedhole to seating plane 0.610 0.649 15.5 16.5 l defective unit clipped dimension 0.3346 0.433 8.5 11 l1 lead wire enclosure 0.09842 ? 2.5 ? p feedhole pitch 0.4921 0.5079 12.5 12.9 p1 feedhole center to center lead 0.2342 0.2658 5.95 6.75 p2 first lead spacing dimension 0.1397 0.1556 3.55 3.95 t adhesive tape thickness 0.06 0.08 0.15 0.20 t1 overall taped package thickness ? 0.0567 ? 1.44 t2 carrier strip thickness 0.014 0.027 0.35 0.65 w carrier strip width 0.6889 0.7481 17.5 19 w1 adhesive tape width 0.2165 0.2841 5.5 6.3 w2 adhesive tape position 0.0059 0.01968 0.15 0.5 notes: 2. maximum alignment deviation between leads not to be greater than 0.2 mm. 3. defective components shall be clipped from the carrier tape such that the remaining protrusion (l) does not exceed a maximum of 11 mm. 4. component lead to tape adhesion must meet the pull test requirements. 5. maximum non?cumulative variation between tape feed holes shall not exceed 1 mm in 20 pitches. 6. holddown tape not to extend beyond the edge(s) of carrier tape and there shall be no exposure of adhesive. 7. no more than 1 consecutive missing component is permitted. 8. a tape trailer and leader, having at least three feed holes is required before the first and after the last component. 9. splices will not interfere with the sprocket feed holes.
mac97 series http://onsemi.com 8 package dimensions to?92 (to?226aa) case 029?11 issue al notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. contour of package beyond dimension r is uncontrolled. 4. lead dimension is uncontrolled in p and beyond dimension k minimum. r a p j l b k g h section x?x c v d n n xx seating plane dim min max min max millimeters inches a 0.175 0.205 4.45 5.20 b 0.170 0.210 4.32 5.33 c 0.125 0.165 3.18 4.19 d 0.016 0.021 0.407 0.533 g 0.045 0.055 1.15 1.39 h 0.095 0.105 2.42 2.66 j 0.015 0.020 0.39 0.50 k 0.500 ??? 12.70 ??? l 0.250 ??? 6.35 ??? n 0.080 0.105 2.04 2.66 p ??? 0.100 ??? 2.54 r 0.115 ??? 2.93 ??? v 0.135 ??? 3.43 ??? 1 style 12: pin 1. main terminal 1 2. gate 3. main terminal 2 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 mac97/d literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082?1312 usa phone : 480?829?7710 or 800?344?3860 toll free usa/canada fax : 480?829?7709 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.
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